Reliable Relays For Ultra Low Power Computation

Tsu- Jae King Liu (UCB) and Roya Maboudian (UCB)

Nano-mechanical switch technology recently has been proposed for ultra-low-power digital integrated circuit (IC) applications.  This is because a mechanical switch exhibits abrupt on/off switching behavior and zero off-state leakage current, so that its operating voltage (VDD) can be reduced to be close to zero, in principle.  Nano-mechanical switch technology can potentially overcome the fundamental energy efficiency limit (which exists due to non-zero off-state leakage current) of CMOS technology.

The endurance of mechanical switching devices can be limited by Joule heating at the contacting asperities, which eventually leads to welding-induced failure.  To provide guidance for reliable switch design, a predictive contact reliability model has been developed and validated experimentally.  The results show that switch endurance depends not only on the contact material, but also on the operating voltage (VDD), series resistance, and load capacitance (CL).  Using the reliability model, endurance exceeding 1015 on/off cycles is projected for a scaled switch technology operating at 1 Volt.

This work was performed under the auspices of the National Science Foundation by University of California Berkeley under Grant No. 0832819.

Switch endurance measurement setup (left) and measured endurance vs. 1/VDD (right)


Nanoelectromechanical Relays – Beyond CMOS?

Tsu-Jae King Liu (UCB) and Roya Maboudian (UCB)

Power consumption has emerged as a major challenge for continued scaling of CMOS technology, the foundation of modern computers. In particular, static power is an issue because transistor off-state leakage current increases exponentially as the size decreases.
In contrast, nano-electromechanical (NEM) relays offer ideal switching performance: zero off-state leakage, abrupt switching and high on-state conductance, over a wide range of operating temperatures. NEM relays can be co-fabricated with CMOS on the same substrate, for managing CMOS static power consumption, and for ultra-low-power embedded static memory (SRAM).
Furthermore, logic operations can also be performed only with NEM relays in a very innovative CMOS-less technology with zero standby power. Due to their high tolerance to radiation and heat, NEM relays can provide for robust electronic systems. As the dimensions of a relay are scaled down, its switching speed increases. The feasibility of high-speed relays with about 1 nanosecond switching time is now being explored.
This work was performed under the auspices of the National Science Foundation by University of California Berkeley under Grant No. 0832819.


Low-Voltage Memory

For low-voltage (<1 Volt) operation of electrostatically actuated relays and mechanical memory devices, nanometer-scale gaps are required. King Liu investigated the formation of gaps as small as 3nm, using silicon dioxide (SiO2) as the sacrificial material and HF vapor etching to selectively remove the SiO2 and form extremely small crevices. Thus far, we have been able to verify that 3nm gaps can be easily formed using HF-vapor etching, by transmission electron microscopy.



Low-Leakage Transistors

Howe and King Liu completed a theoretical design study of a novel nano-electro-mechanical field-effect transistor (NEMFET). The NEMFET employs a mechanical beam as the gate electrode to provide improvements in on-state/off-state transistor current, making it an attractive candidate for low-power electronics applications. The snap-down characteristic of the mechanical gate provides for a steeper turn-on characteristic (subthreshold swing < 60mV/dec). As compared to a conventional transistor (with a fixed, non-mechanical gate electrode), the NEMFET provides substantial improvement in off-state leakage current and hence reduced standby power consumption.